When coupled with Spectrum's expertise in both ruggedization and life cycle management, the SDR SWM is an ideal development and deployment platform for government advanced satellite communications programs. Both of these operating systems are designed for use in embedded systems that require maximum reliability and predictable response times. For more information, please visit www. Spectrum's products and services are optimized for military communications, signals intelligence, surveillance, electronic warfare and satellite communications applications. Spectrum's integrated, application-ready products provide its customers with compelling time-to-market and performance advantages while mitigating program risk and cost parameters. Spectrum also provides applications engineering services and modified commercial-off-the-shelf platforms to the US Government, its allies and its prime contractors.

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The 2 BIT input control is TTL compatible and the time between the 50 percent point of the input control pulse to the 10 to 90 percent point of detected RF is within 40 nS. The power handling capability is 20 dBm. This series is also available with a fixed second LO output option which also maintains the low noise of the main output in dual conversion systems. Fixed LO can be tuned to alternate frequency via communication interface.

The BTE is packaged to meet extremely low EMI emission requirements and has options for parallel or serial communications and control. The architecture is a multi-stage superheterodyne design that will translate an X-band signal with the frequency excursion of 1, MHz to an IF center frequency of 70 MHz with an instantaneous bandwidth of 20 MHz.

The receiver's functionality includes automatic gain control AGC attenuator with analog sampling, channel gain balance attenuator, channel phase balance phase shifter, signal injection point, peak detected signals available VME interface and RF signal monitoring points.

The receiver is fabricated into a three-slot wide VME module. Control of the receive components is done using standard VME bus protocols.

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Viterbi Decoders are used in systems where data are transmitted and subject to errors before reception. The Viterbi Decoder LogiCORE IP consists of two basic architectures: a fully parallel implementation which gives fast data throughput and a serial implementation which occupies a small area. The core also has a puncturing option, giving a large range of transmission rates and reducing the bandwidth requirement on the channel. Puncturing can also be carried out externally to the decoder and the erasure pins in the erasure bus ERASE can be asserted to indicate the presence of null-symbols. Intellectual Property Viterbi Decoder. Viterbi Decoder. Evaluate IP.


Viterbi Decoder

This page contains answers to common questions handled by our support staff, along with some tips and tricks that we have found useful and presented here as questions. This can make the set-up daunting at first. From that point you make necessary changes to set the desired configuration. Once all parameters are set as required the configuration can be saved using the control.

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